State retention power gating (SRPG) is an effective strategy that is widely used to help reducing power consumption of an integrated circuit while maintaining the same levels of performance and functionality.
A SRPG flip-flop may operate in a functional mode or in a state retention mode. In the functional mode, the SRPG flip-flop performs its primary function, such as processing or storing bits. When in the state retention mode the SRPG flip-flop stores state information that is indicative of a state of the SRPG flip-flop at the end of the functional mode preceding the entry into the state retention mode. The power consumption of the SRPG flip-flop, when in the state retention mode, is lower than the power consumption of the SRPG flip-flop when in the functional mode.
The SRPG flip-flop is connected to a gated power grid and to a non-gated power grid. The non-gated power grid provides power to the SRPG flip-flop when the SRPG flip-flop is in the state retention mode and also provides power to the SRPG flip-flop when in the functional mode. The gated power grid provides power to the SRPG flip-flop only when the SRPG flip-flop in the functional mode.
The gated power grid and the non-gated power grid may be connected to a power source that provides power regardless of the operational mode of the SRPG flip-flop. Typically, the gated power grid may be connected to the power source via multiple switches. However, the placement of these switches may be very problematic in dense integrated circuit and especially in flip-chip package integrated circuits in which power source pins are positioned above the semiconductor real estate.